The present invention is generally related to a chip tester, a method for providing timing information, a test fixture set, an apparatus for post-processing propagation delay information, a method for post-processing delay information, a chip test set up and a method for testing devices under test.
In an embodiment, the present invention is related to a fixture delay calibration in a driver sharing test environment.
In the field of testing devices it is sometimes advantageous to connect a plurality of devices under test to a common line. Consequently, terminals of at least two devices under test are connected to a common channel of a chip tester. These terminals are typically designated as shared terminals. However, some of the terminals of the devices under test are connected to channels of the chip tester via individual (non-shared or unshared) lines. Thus, in typical setups there are both shared terminals of devices under test, which are connected to the chip tester via a shared line and unshared terminals, which are connected to channels of the chip tester via unshared lines.
However, the sharing of lines for connecting a plurality of devices under test to a single channel brings along significant difficulties in obtaining reliable test results.